%0 Journal Article %1 journals/tsp/ChiperSAS02 %A Chiper, Doru-Florin %A Swamy, M. N. S. %A Ahmad, M. Omair %A Stouraitis, Thanos %D 2002 %J IEEE Trans. Signal Process. %K dblp %N 9 %P 2347-2354 %T A systolic array architecture for the discrete sine transform. %U http://dblp.uni-trier.de/db/journals/tsp/tsp50.html#ChiperSAS02 %V 50

@article{journals/tsp/ChiperSAS02, added-at = {2020-03-10T00:00:00.000+0100}, author = {Chiper, Doru-Florin and Swamy, M. N. S. and Ahmad, M. Omair and Stouraitis, Thanos}, biburl = {https://www.bibsonomy.org/bibtex/281885f27ef044fb3de34dd24be83b4a3/dblp}, ee = {https://doi.org/10.1109/TSP.2002.801940}, interhash = {8ee2f6e0149bdaf4870cd1e2d04a99ef}, intrahash = {81885f27ef044fb3de34dd24be83b4a3}, journal = {IEEE Trans. Signal Process.}, keywords = {dblp}, number = 9, pages = {2347-2354}, timestamp = {2020-03-11T12:04:24.000+0100}, title = {A systolic array architecture for the discrete sine transform.}, url = {http://dblp.uni-trier.de/db/journals/tsp/tsp50.html#ChiperSAS02}, volume = 50, year = 2002 }