%0 Journal Article %1 journals/corr/abs-0712-2302 %A Hager, Georg %A Zeiser, Thomas %A Wellein, Gerhard %D 2007 %J CoRR %K dblp %T Data access optimizations for highly threaded multi-core CPUs with multiple memory controllers %U http://dblp.uni-trier.de/db/journals/corr/corr0712.html#abs-0712-2302 %V abs/0712.2302

@article{journals/corr/abs-0712-2302, added-at = {2018-08-13T00:00:00.000+0200}, author = {Hager, Georg and Zeiser, Thomas and Wellein, Gerhard}, biburl = {https://www.bibsonomy.org/bibtex/2ac3b5b09dd560d0c143ebc75e5d0d539/dblp}, ee = {http://arxiv.org/abs/0712.2302}, interhash = {938faea50d95080e38381768cbf035b2}, intrahash = {ac3b5b09dd560d0c143ebc75e5d0d539}, journal = {CoRR}, keywords = {dblp}, timestamp = {2018-08-14T11:42:20.000+0200}, title = {Data access optimizations for highly threaded multi-core CPUs with multiple memory controllers}, url = {http://dblp.uni-trier.de/db/journals/corr/corr0712.html#abs-0712-2302}, volume = {abs/0712.2302}, year = 2007 }