%0 Conference Paper %1 conf/delta/BhaskaranSSZ06 %A Bhaskaran, Madhu %A Sriram, Sharath %A Stojcevski, Aleksandar %A Zayegh, Aladin %B DELTA %D 2006 %I IEEE Computer Society %K dblp %P 219-222 %T Design & Simulation of a High Performance Rail-to-Rail CMOS Op-Amp at ± 3V Supply. %U http://dblp.uni-trier.de/db/conf/delta/delta2006.html#BhaskaranSSZ06 %@ 0-7695-2500-8

@inproceedings{conf/delta/BhaskaranSSZ06, added-at = {2023-03-24T00:00:00.000+0100}, author = {Bhaskaran, Madhu and Sriram, Sharath and Stojcevski, Aleksandar and Zayegh, Aladin}, biburl = {https://www.bibsonomy.org/bibtex/2a2d9c5cef5f0b724ac0d99871c0b8864/dblp}, booktitle = {DELTA}, crossref = {conf/delta/2006}, ee = {https://doi.ieeecomputersociety.org/10.1109/DELTA.2006.30}, interhash = {9391c2aae264dd674c6663ca7a22125b}, intrahash = {a2d9c5cef5f0b724ac0d99871c0b8864}, isbn = {0-7695-2500-8}, keywords = {dblp}, pages = {219-222}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T16:16:14.000+0200}, title = {Design & Simulation of a High Performance Rail-to-Rail CMOS Op-Amp at ± 3V Supply.}, url = {http://dblp.uni-trier.de/db/conf/delta/delta2006.html#BhaskaranSSZ06}, year = 2006 }