%0 Journal Article %1 journals/tcas/WuLHHTLPHLKC17 %A Wu, Shang-Lin %A Li, Kuang-Yu %A Huang, Po-Tsang %A Hwang, Wei %A Tu, Ming-Hsien %A Lung, Sheng-Chi %A Peng, Wei-Sheng %A Huang, Huan-Shun %A Lee, Kuen-Di %A Kao, Yung-Shin %A Chuang, Ching-Te %D 2017 %J IEEE Trans. Circuits Syst. I Regul. Pap. %K dblp %N 7 %P 1791-1802 %T A 0.5-V 28-nm 256-kb Mini-Array Based 6T SRAM With Vtrip-Tracking Write-Assist. %U http://dblp.uni-trier.de/db/journals/tcas/tcasI64.html#WuLHHTLPHLKC17 %V 64-I

@article{journals/tcas/WuLHHTLPHLKC17, added-at = {2020-05-22T00:00:00.000+0200}, author = {Wu, Shang-Lin and Li, Kuang-Yu and Huang, Po-Tsang and Hwang, Wei and Tu, Ming-Hsien and Lung, Sheng-Chi and Peng, Wei-Sheng and Huang, Huan-Shun and Lee, Kuen-Di and Kao, Yung-Shin and Chuang, Ching-Te}, biburl = {https://www.bibsonomy.org/bibtex/2ff697e53a5a2e70598dbc675ce9f0e6b/dblp}, ee = {https://doi.org/10.1109/TCSI.2017.2681738}, interhash = {93cb36a471409e6c230032a8d61a95dc}, intrahash = {ff697e53a5a2e70598dbc675ce9f0e6b}, journal = {IEEE Trans. Circuits Syst. I Regul. Pap.}, keywords = {dblp}, number = 7, pages = {1791-1802}, timestamp = {2020-05-23T12:33:29.000+0200}, title = {A 0.5-V 28-nm 256-kb Mini-Array Based 6T SRAM With Vtrip-Tracking Write-Assist.}, url = {http://dblp.uni-trier.de/db/journals/tcas/tcasI64.html#WuLHHTLPHLKC17}, volume = {64-I}, year = 2017 }