%0 Journal Article %1 journals/dtj/BowhillBBBBCDEFGJKLLMMPSSST95 %A Bowhill, William J. %A Bell, Shane L. %A Benschneider, Bradley J. %A Black, Andrew J. %A Britton, Sharon M. %A Castelino, Ruben W. %A Donchin, Dale R. %A Edmondson, John H. %A III, Harry R. Fair %A Gronowski, Paul E. %A Jain, Anil K. %A Kroesen, Patricia L. %A Lamere, Marc E. %A Loughlin, Bruce J. %A Mehta, Shekhar %A Mueller, Robert O. %A Preston, Ronald P. %A Santhanam, Sribalan %A Shedd, Timothy A. %A Smith, Michael J. %A Thierauf, Stephen C. %D 1995 %J Digit. Tech. J. %K dblp %N 1 %T Circuit Implementation of a 300-MHz 64-bit Second-generation CMOS Alpha CPU %U http://dblp.uni-trier.de/db/journals/dtj/dtj7.html#BowhillBBBBCDEFGJKLLMMPSSST95 %V 7

@article{journals/dtj/BowhillBBBBCDEFGJKLLMMPSSST95, added-at = {2023-01-23T00:00:00.000+0100}, author = {Bowhill, William J. and Bell, Shane L. and Benschneider, Bradley J. and Black, Andrew J. and Britton, Sharon M. and Castelino, Ruben W. and Donchin, Dale R. and Edmondson, John H. and III, Harry R. Fair and Gronowski, Paul E. and Jain, Anil K. and Kroesen, Patricia L. and Lamere, Marc E. and Loughlin, Bruce J. and Mehta, Shekhar and Mueller, Robert O. and Preston, Ronald P. and Santhanam, Sribalan and Shedd, Timothy A. and Smith, Michael J. and Thierauf, Stephen C.}, biburl = {https://www.bibsonomy.org/bibtex/2fe0eb2d613160570638c3e0124266cb8/dblp}, ee = {https://www.hpl.hp.com/hpjournal/dtj/vol7num1/vol7num1art8.pdf}, interhash = {195e9cd7b746958ac0b192411817f0fe}, intrahash = {fe0eb2d613160570638c3e0124266cb8}, journal = {Digit. Tech. J.}, keywords = {dblp}, number = 1, timestamp = {2024-04-09T01:50:09.000+0200}, title = {Circuit Implementation of a 300-MHz 64-bit Second-generation CMOS Alpha CPU}, url = {http://dblp.uni-trier.de/db/journals/dtj/dtj7.html#BowhillBBBBCDEFGJKLLMMPSSST95}, volume = 7, year = 1995 }