%0 Journal Article %1 journals/ieicet/OkunoIN05 %A Okuno, Michitaka %A Ishida, Shinichi %A Nishi, Hiroaki %D 2005 %J IEICE Trans. Electron. %K dblp %N 4 %P 536-543 %T Low-Power Network-Packet-Processing Architecture Using Process-Learning Cache for High-End Backbone Router. %U http://dblp.uni-trier.de/db/journals/ieicet/ieicet88c.html#OkunoIN05 %V 88-C

@article{journals/ieicet/OkunoIN05, added-at = {2020-04-11T00:00:00.000+0200}, author = {Okuno, Michitaka and Ishida, Shinichi and Nishi, Hiroaki}, biburl = {https://www.bibsonomy.org/bibtex/21706e31ae8633b48f9ccbd5f40461c5a/dblp}, ee = {https://doi.org/10.1093/ietele/e88-c.4.536}, interhash = {968c93750b17da3f86ef81f3e01c8e77}, intrahash = {1706e31ae8633b48f9ccbd5f40461c5a}, journal = {IEICE Trans. Electron.}, keywords = {dblp}, number = 4, pages = {536-543}, timestamp = {2020-04-14T11:53:23.000+0200}, title = {Low-Power Network-Packet-Processing Architecture Using Process-Learning Cache for High-End Backbone Router.}, url = {http://dblp.uni-trier.de/db/journals/ieicet/ieicet88c.html#OkunoIN05}, volume = {88-C}, year = 2005 }