Inproceedings,
MapReduce-based pattern classification for design space analysis.
Y. Wu, H. Su, Y. Chang, R. Topaloglu, and Y. Li.VLSI-DAT, page 1-4. IEEE, (2018)
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- conf/vlsi-dat/WuSCTL18
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- inproceedings
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- VLSI-DAT
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- 2018
- pages
- 1-4
- publisher
- IEEE
- crossref
- conf/vlsi-dat/2018
- ee
- https://doi.org/10.1109/VLSI-DAT.2018.8373275
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- 978-1-5386-4260-3
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- http://dblp.uni-trier.de/db/conf/vlsi-dat/vlsi-dat2018.html#WuSCTL18
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%1 conf/vlsi-dat/WuSCTL18
%A Wu, Yan-Shiun
%A Su, Hong-Yan
%A Chang, Yi-Hsiang
%A Topaloglu, Rasit Onur
%A Li, Yih-Lang
%B VLSI-DAT
%D 2018
%I IEEE
%K dblp
%P 1-4
%T MapReduce-based pattern classification for design space analysis.
%U http://dblp.uni-trier.de/db/conf/vlsi-dat/vlsi-dat2018.html#WuSCTL18
%@ 978-1-5386-4260-3
@inproceedings{conf/vlsi-dat/WuSCTL18,
added-at = {2023-03-21T00:00:00.000+0100},
author = {Wu, Yan-Shiun and Su, Hong-Yan and Chang, Yi-Hsiang and Topaloglu, Rasit Onur and Li, Yih-Lang},
biburl = {https://www.bibsonomy.org/bibtex/2aaff91a5c91f7c3e130b3e3920d765ee/dblp},
booktitle = {VLSI-DAT},
crossref = {conf/vlsi-dat/2018},
ee = {https://doi.org/10.1109/VLSI-DAT.2018.8373275},
interhash = {9b4cf4c005f122eb4eaf43cbd67ae4b5},
intrahash = {aaff91a5c91f7c3e130b3e3920d765ee},
isbn = {978-1-5386-4260-3},
keywords = {dblp},
pages = {1-4},
publisher = {IEEE},
timestamp = {2024-04-10T19:50:03.000+0200},
title = {MapReduce-based pattern classification for design space analysis.},
url = {http://dblp.uni-trier.de/db/conf/vlsi-dat/vlsi-dat2018.html#WuSCTL18},
year = 2018
}