%0 Journal Article %1 journals/tcad/UpadhyayaS88 %A Upadhyaya, Shambhu J. %A Saluja, Kewal K. %D 1988 %J IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. %K dblp %N 1 %P 60-67 %T A new approach to the design of built-in self-testing PLAs for high fault coverage. %U http://dblp.uni-trier.de/db/journals/tcad/tcad7.html#UpadhyayaS88 %V 7

@article{journals/tcad/UpadhyayaS88, added-at = {2020-09-24T00:00:00.000+0200}, author = {Upadhyaya, Shambhu J. and Saluja, Kewal K.}, biburl = {https://www.bibsonomy.org/bibtex/225331f001a8bf64d47c414e9e563bd4e/dblp}, ee = {https://doi.org/10.1109/43.3130}, interhash = {a309883c12da92896910928ffa393cf0}, intrahash = {25331f001a8bf64d47c414e9e563bd4e}, journal = {IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.}, keywords = {dblp}, number = 1, pages = {60-67}, timestamp = {2020-09-25T11:45:41.000+0200}, title = {A new approach to the design of built-in self-testing PLAs for high fault coverage.}, url = {http://dblp.uni-trier.de/db/journals/tcad/tcad7.html#UpadhyayaS88}, volume = 7, year = 1988 }