%0 Conference Paper %1 conf/icact/ZhangWWW19 %A Zhang, Xiaoyong %A Wu, Ruizhen %A Wang, Mingming %A Wang, Lin %B ICACT %D 2019 %I IEEE %K dblp %P 52-55 %T A High-Performance Parallel Computation Hardware Architecture in ASIC of SHA-256 Hash. %U http://dblp.uni-trier.de/db/conf/icact/icact2019.html#ZhangWWW19 %@ 979-11-88428-02-1

@inproceedings{conf/icact/ZhangWWW19, added-at = {2022-03-22T00:00:00.000+0100}, author = {Zhang, Xiaoyong and Wu, Ruizhen and Wang, Mingming and Wang, Lin}, biburl = {https://www.bibsonomy.org/bibtex/233bb53b1af10c262ccb912e45cf055c8/dblp}, booktitle = {ICACT}, crossref = {conf/icact/2019}, ee = {https://doi.org/10.23919/ICACT.2019.8701906}, interhash = {a37250e0a04e42955cc866a75aa24b8e}, intrahash = {33bb53b1af10c262ccb912e45cf055c8}, isbn = {979-11-88428-02-1}, keywords = {dblp}, pages = {52-55}, publisher = {IEEE}, timestamp = {2024-04-09T12:01:08.000+0200}, title = {A High-Performance Parallel Computation Hardware Architecture in ASIC of SHA-256 Hash.}, url = {http://dblp.uni-trier.de/db/conf/icact/icact2019.html#ZhangWWW19}, year = 2019 }