%0 Journal Article %1 journals/tvlsi/PolsterTWJC16 %A Polster, Robert %A Thonnart, Yvain %A Waltener, Guillaume %A Jimenez, Jose-Luis Gonzalez %A Cassan, Eric %D 2016 %J IEEE Trans. Very Large Scale Integr. Syst. %K dblp %N 12 %P 3450-3459 %T Efficiency Optimization of Silicon Photonic Links in 65-nm CMOS and 28-nm FDSOI Technology Nodes. %U http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi24.html#PolsterTWJC16 %V 24

@article{journals/tvlsi/PolsterTWJC16, added-at = {2020-03-11T00:00:00.000+0100}, author = {Polster, Robert and Thonnart, Yvain and Waltener, Guillaume and Jimenez, Jose-Luis Gonzalez and Cassan, Eric}, biburl = {https://www.bibsonomy.org/bibtex/2ca82ab17ad78470fb336063ba510a7d9/dblp}, ee = {https://doi.org/10.1109/TVLSI.2016.2553673}, interhash = {a5536d8e6f8d0002f83e26f933152dd1}, intrahash = {ca82ab17ad78470fb336063ba510a7d9}, journal = {IEEE Trans. Very Large Scale Integr. Syst.}, keywords = {dblp}, number = 12, pages = {3450-3459}, timestamp = {2020-03-12T11:40:57.000+0100}, title = {Efficiency Optimization of Silicon Photonic Links in 65-nm CMOS and 28-nm FDSOI Technology Nodes.}, url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi24.html#PolsterTWJC16}, volume = 24, year = 2016 }