%0 Journal Article %1 journals/jssc/LeeWBW19 %A Lee, Sae Kyu %A Whatmough, Paul N. %A Brooks, David %A Wei, Gu-Yeon %D 2019 %J IEEE J. Solid State Circuits %K dblp %N 7 %P 1982-1992 %T A 16-nm Always-On DNN Processor With Adaptive Clocking and Multi-Cycle Banked SRAMs. %U http://dblp.uni-trier.de/db/journals/jssc/jssc54.html#LeeWBW19 %V 54

@article{journals/jssc/LeeWBW19, added-at = {2020-08-30T00:00:00.000+0200}, author = {Lee, Sae Kyu and Whatmough, Paul N. and Brooks, David and Wei, Gu-Yeon}, biburl = {https://www.bibsonomy.org/bibtex/2f39edcfc9dde1b8329fcfccc4895aad8/dblp}, ee = {https://doi.org/10.1109/JSSC.2019.2913098}, interhash = {a66f737a26a2024e903f280f194b4491}, intrahash = {f39edcfc9dde1b8329fcfccc4895aad8}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 7, pages = {1982-1992}, timestamp = {2020-08-31T11:40:31.000+0200}, title = {A 16-nm Always-On DNN Processor With Adaptive Clocking and Multi-Cycle Banked SRAMs.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc54.html#LeeWBW19}, volume = 54, year = 2019 }