%0 Conference Paper %1 conf/iscas/PadillaRCLC06 %A Padilla, Ivan %A Ramírez-Angulo, Jaime %A Carvajal, Ramón González %A López-Martín, Antonio J. %A Carlosena, Alfonso %B ISCAS %D 2006 %I IEEE %K dblp %T Compact implementation of linear weighted CMOS transconductance adder based on the flipped voltage follower. %U http://dblp.uni-trier.de/db/conf/iscas/iscas2006.html#PadillaRCLC06 %@ 0-7803-9389-9

@inproceedings{conf/iscas/PadillaRCLC06, added-at = {2020-09-05T00:00:00.000+0200}, author = {Padilla, Ivan and Ramírez-Angulo, Jaime and Carvajal, Ramón González and López-Martín, Antonio J. and Carlosena, Alfonso}, biburl = {https://www.bibsonomy.org/bibtex/2326d8c41e1fee0e31c955f7f0dcb3507/dblp}, booktitle = {ISCAS}, crossref = {conf/iscas/2006}, ee = {https://doi.org/10.1109/ISCAS.2006.1693575}, interhash = {a6b06b3b3aa3122ba31d62f874cc7ac6}, intrahash = {326d8c41e1fee0e31c955f7f0dcb3507}, isbn = {0-7803-9389-9}, keywords = {dblp}, publisher = {IEEE}, timestamp = {2020-09-09T14:31:13.000+0200}, title = {Compact implementation of linear weighted CMOS transconductance adder based on the flipped voltage follower.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2006.html#PadillaRCLC06}, year = 2006 }