%0 Journal Article %1 journals/jssc/PlasVSSG99 %A der Plas, Geert Van %A Vandenbussche, Jan %A Sansen, Willy %A Steyaert, Michel S. J. %A Gielen, Georges G. E. %D 1999 %J IEEE J. Solid State Circuits %K dblp %N 12 %P 1708-1718 %T A 14-bit intrinsic accuracy Q2 random walk CMOS DAC. %U http://dblp.uni-trier.de/db/journals/jssc/jssc34.html#PlasVSSG99 %V 34

@article{journals/jssc/PlasVSSG99, added-at = {2022-10-02T00:00:00.000+0200}, author = {der Plas, Geert Van and Vandenbussche, Jan and Sansen, Willy and Steyaert, Michel S. J. and Gielen, Georges G. E.}, biburl = {https://www.bibsonomy.org/bibtex/2a66bdb51d664cf3567f850498691eccf/dblp}, ee = {https://doi.org/10.1109/4.808896}, interhash = {a6f20ad70b843673e2f3209abc5f93ee}, intrahash = {a66bdb51d664cf3567f850498691eccf}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 12, pages = {1708-1718}, timestamp = {2024-04-08T10:42:26.000+0200}, title = {A 14-bit intrinsic accuracy Q2 random walk CMOS DAC.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc34.html#PlasVSSG99}, volume = 34, year = 1999 }