%0 Conference Paper %1 conf/aspdac/WuXXWLYL20 %A Wu, Juejian %A Xu, Yixin %A Xue, Bowen %A Wang, Yu %A Liu, Yongpan %A Yang, Huazhong %A Li, Xueqing %B ASP-DAC %D 2020 %I IEEE %K dblp %P 407-413 %T Adaptive Circuit Approaches to Low-Power Multi-Level/Cell FeFET Memory. %U http://dblp.uni-trier.de/db/conf/aspdac/aspdac2020.html#WuXXWLYL20 %@ 978-1-7281-4123-7

@inproceedings{conf/aspdac/WuXXWLYL20, added-at = {2020-06-30T00:00:00.000+0200}, author = {Wu, Juejian and Xu, Yixin and Xue, Bowen and Wang, Yu and Liu, Yongpan and Yang, Huazhong and Li, Xueqing}, biburl = {https://www.bibsonomy.org/bibtex/253a01f95cca933a5010502b2fbc3d8e1/dblp}, booktitle = {ASP-DAC}, crossref = {conf/aspdac/2020}, ee = {https://doi.org/10.1109/ASP-DAC47756.2020.9045106}, interhash = {af5f1fff8261aab94a0ad5ab58eb109f}, intrahash = {53a01f95cca933a5010502b2fbc3d8e1}, isbn = {978-1-7281-4123-7}, keywords = {dblp}, pages = {407-413}, publisher = {IEEE}, timestamp = {2020-07-01T11:51:22.000+0200}, title = {Adaptive Circuit Approaches to Low-Power Multi-Level/Cell FeFET Memory.}, url = {http://dblp.uni-trier.de/db/conf/aspdac/aspdac2020.html#WuXXWLYL20}, year = 2020 }