%0 Journal Article %1 journals/tcas/VadaliMRC20 %A Vadali, Siva Ram Krishna %A Mula, Subrahmanyam %A Ray, Priyadip %A Chakrabarti, Saswat %D 2020 %J IEEE Trans. Circuits Syst. I Regul. Pap. %K dblp %N 6 %P 1962-1975 %T Area Efficient VLSI Architectures for Weak Signal Detection in Additive Generalized Cauchy Noise. %U http://dblp.uni-trier.de/db/journals/tcas/tcasI67.html#VadaliMRC20 %V 67-I

@article{journals/tcas/VadaliMRC20, added-at = {2020-10-01T00:00:00.000+0200}, author = {Vadali, Siva Ram Krishna and Mula, Subrahmanyam and Ray, Priyadip and Chakrabarti, Saswat}, biburl = {https://www.bibsonomy.org/bibtex/2acdb6b9b468ed0a3deb8f7a88aadebf1/dblp}, ee = {https://doi.org/10.1109/TCSI.2020.2969985}, interhash = {b24b4b98b460e5344ca05cd2f18321ff}, intrahash = {acdb6b9b468ed0a3deb8f7a88aadebf1}, journal = {IEEE Trans. Circuits Syst. I Regul. Pap.}, keywords = {dblp}, number = 6, pages = {1962-1975}, timestamp = {2020-10-02T11:46:10.000+0200}, title = {Area Efficient VLSI Architectures for Weak Signal Detection in Additive Generalized Cauchy Noise.}, url = {http://dblp.uni-trier.de/db/journals/tcas/tcasI67.html#VadaliMRC20}, volume = {67-I}, year = 2020 }