%0 Journal Article %1 journals/tvlsi/BhattacharyaBJ15 %A Bhattacharya, Debajit %A Bhoj, Ajay N. %A Jha, Niraj K. %D 2015 %J IEEE Trans. Very Large Scale Integr. Syst. %K dblp %N 5 %P 963-967 %T Design of Efficient Content Addressable Memories in High-Performance FinFET Technology. %U http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi23.html#BhattacharyaBJ15 %V 23

@article{journals/tvlsi/BhattacharyaBJ15, added-at = {2020-03-11T00:00:00.000+0100}, author = {Bhattacharya, Debajit and Bhoj, Ajay N. and Jha, Niraj K.}, biburl = {https://www.bibsonomy.org/bibtex/26f9d1f6bbd599835cee78720cf8bd3b0/dblp}, ee = {https://doi.org/10.1109/TVLSI.2014.2319192}, interhash = {b9b0f83bed385edbcee342826b7399c0}, intrahash = {6f9d1f6bbd599835cee78720cf8bd3b0}, journal = {IEEE Trans. Very Large Scale Integr. Syst.}, keywords = {dblp}, number = 5, pages = {963-967}, timestamp = {2020-03-12T11:41:44.000+0100}, title = {Design of Efficient Content Addressable Memories in High-Performance FinFET Technology.}, url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi23.html#BhattacharyaBJ15}, volume = 23, year = 2015 }