%0 Conference Paper %1 conf/aspdac/ChenSYL16 %A Chen, Renhai %A Shao, Zili %A Yang, Chia-Lin %A Li, Tao %B ASP-DAC %D 2016 %I IEEE %K dblp %P 153-158 %T MCSSim: A memory channel storage simulator. %U http://dblp.uni-trier.de/db/conf/aspdac/aspdac2016.html#ChenSYL16 %@ 978-1-4673-9569-4

@inproceedings{conf/aspdac/ChenSYL16, added-at = {2021-09-15T00:00:00.000+0200}, author = {Chen, Renhai and Shao, Zili and Yang, Chia-Lin and Li, Tao}, biburl = {https://www.bibsonomy.org/bibtex/24776389ae088478b80262281c711c2c8/dblp}, booktitle = {ASP-DAC}, crossref = {conf/aspdac/2016}, ee = {https://doi.org/10.1109/ASPDAC.2016.7428004}, interhash = {babb77cf2b16699fe9b882a8fcc71d75}, intrahash = {4776389ae088478b80262281c711c2c8}, isbn = {978-1-4673-9569-4}, keywords = {dblp}, pages = {153-158}, publisher = {IEEE}, timestamp = {2024-04-10T04:16:39.000+0200}, title = {MCSSim: A memory channel storage simulator.}, url = {http://dblp.uni-trier.de/db/conf/aspdac/aspdac2016.html#ChenSYL16}, year = 2016 }