%0 Conference Paper %1 conf/latw/ChauGSP02 %A Chau, Wang Jiang %A González, Jose Artur Quilici %A Strum, Marius %A Pires, Ricardo %B LATW %D 2002 %I IEEE %K dblp %P 64-69 %T BIST Plan Optimization and Independent Input Test Register Insertion for Datapath Functional Units. %U http://dblp.uni-trier.de/db/conf/latw/latw2002.html#ChauGSP02

@inproceedings{conf/latw/ChauGSP02, added-at = {2023-07-26T00:00:00.000+0200}, author = {Chau, Wang Jiang and González, Jose Artur Quilici and Strum, Marius and Pires, Ricardo}, biburl = {https://www.bibsonomy.org/bibtex/2053c08bacb2f0a8b131a623c8aed3087/dblp}, booktitle = {LATW}, crossref = {conf/latw/2002}, interhash = {bcb1705b3478f716011f30f9ab8118bf}, intrahash = {053c08bacb2f0a8b131a623c8aed3087}, keywords = {dblp}, pages = {64-69}, publisher = {IEEE}, timestamp = {2024-04-09T22:48:18.000+0200}, title = {BIST Plan Optimization and Independent Input Test Register Insertion for Datapath Functional Units.}, url = {http://dblp.uni-trier.de/db/conf/latw/latw2002.html#ChauGSP02}, year = 2002 }