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%0 Conference Paper
%1 conf/cicc/MercierSIMO06
%A Mercier, Patrick P.
%A Singh, S. R.
%A Iniewski, Krzysztof
%A Moore, Brian
%A O'Shea, P.
%B CICC
%D 2006
%I IEEE
%K dblp
%P 357-360
%T Yield and Cost Modeling for 3D Chip Stack Technologies.
%U http://dblp.uni-trier.de/db/conf/cicc/cicc2006.html#MercierSIMO06
%@ 1-4244-0075-9
@inproceedings{conf/cicc/MercierSIMO06,
added-at = {2020-06-05T00:00:00.000+0200},
author = {Mercier, Patrick P. and Singh, S. R. and Iniewski, Krzysztof and Moore, Brian and O'Shea, P.},
biburl = {https://www.bibsonomy.org/bibtex/2e2fbb0f7202366ec7abfdda3fb3a05e5/dblp},
booktitle = {CICC},
crossref = {conf/cicc/2006},
ee = {https://doi.org/10.1109/CICC.2006.320948},
interhash = {bd67b7438f8b06ca6c87688bf005aa57},
intrahash = {e2fbb0f7202366ec7abfdda3fb3a05e5},
isbn = {1-4244-0075-9},
keywords = {dblp},
pages = {357-360},
publisher = {IEEE},
timestamp = {2020-06-06T11:48:11.000+0200},
title = {Yield and Cost Modeling for 3D Chip Stack Technologies.},
url = {http://dblp.uni-trier.de/db/conf/cicc/cicc2006.html#MercierSIMO06},
year = 2006
}