%0 Conference Paper %1 conf/isvlsi/LuJJHS22 %A Lu, Qing %A Jiang, Weiwen %A Jiang, Meng %A Hu, Jingtong %A Shi, Yiyu %B ISVLSI %D 2022 %I IEEE %K dblp %P 358-362 %T Hardware/Software Co-Exploration for Graph Neural Architectures on FPGAs. %U http://dblp.uni-trier.de/db/conf/isvlsi/isvlsi2022.html#LuJJHS22 %@ 978-1-6654-6605-9

@inproceedings{conf/isvlsi/LuJJHS22, added-at = {2022-12-13T00:00:00.000+0100}, author = {Lu, Qing and Jiang, Weiwen and Jiang, Meng and Hu, Jingtong and Shi, Yiyu}, biburl = {https://www.bibsonomy.org/bibtex/2485978315b8ca2ffed899cdfe58881c7/dblp}, booktitle = {ISVLSI}, crossref = {conf/isvlsi/2022}, ee = {https://doi.org/10.1109/ISVLSI54635.2022.00079}, interhash = {c4d0815ccae46bf89dfdd9773fb221a0}, intrahash = {485978315b8ca2ffed899cdfe58881c7}, isbn = {978-1-6654-6605-9}, keywords = {dblp}, pages = {358-362}, publisher = {IEEE}, timestamp = {2024-04-09T11:37:04.000+0200}, title = {Hardware/Software Co-Exploration for Graph Neural Architectures on FPGAs.}, url = {http://dblp.uni-trier.de/db/conf/isvlsi/isvlsi2022.html#LuJJHS22}, year = 2022 }