%0 Conference Paper %1 conf/eurodac/BurgunDGLS94 %A Burgun, Luc %A Dictus, N. %A Greiner, Alain %A Lopes, E. Prado %A Sarwary, C. %B EURO-DAC %D 1994 %E Mermet, Jean %I IEEE Computer Society %K dblp %P 14-19 %T Multilevel logic optimization of very high complexity circuits. %U http://dblp.uni-trier.de/db/conf/eurodac/euro-dac1994.html#BurgunDGLS94 %@ 0-89791-685-9

@inproceedings{conf/eurodac/BurgunDGLS94, added-at = {2015-11-11T00:00:00.000+0100}, author = {Burgun, Luc and Dictus, N. and Greiner, Alain and Lopes, E. Prado and Sarwary, C.}, biburl = {https://www.bibsonomy.org/bibtex/2275921e5f8733e311ff68aa62bee2c40/dblp}, booktitle = {EURO-DAC}, crossref = {conf/eurodac/1994}, editor = {Mermet, Jean}, ee = {http://dl.acm.org/citation.cfm?id=198182}, interhash = {c562ed628167a1ba8871e77bd113a96c}, intrahash = {275921e5f8733e311ff68aa62bee2c40}, isbn = {0-89791-685-9}, keywords = {dblp}, pages = {14-19}, publisher = {IEEE Computer Society}, timestamp = {2015-11-13T11:50:31.000+0100}, title = {Multilevel logic optimization of very high complexity circuits.}, url = {http://dblp.uni-trier.de/db/conf/eurodac/euro-dac1994.html#BurgunDGLS94}, year = 1994 }