%0 Conference Paper %1 conf/vdat/RaveendranPDSS15 %A Raveendran, Aneesh %A Patil, Vinayak %A Desalphine, Vivian %A Sobha, P. M. %A Selvakumar, A. David %B VDAT %D 2015 %I IEEE Computer Society %K dblp %P 1-2 %T RISC-V out-of-order data conversion co-processor. %U http://dblp.uni-trier.de/db/conf/vdat/vdat2015.html#RaveendranPDSS15 %@ 978-1-4799-1743-3

@inproceedings{conf/vdat/RaveendranPDSS15, added-at = {2023-03-24T00:00:00.000+0100}, author = {Raveendran, Aneesh and Patil, Vinayak and Desalphine, Vivian and Sobha, P. M. and Selvakumar, A. David}, biburl = {https://www.bibsonomy.org/bibtex/2d6c0461339bdfd933cd8231ecbc76482/dblp}, booktitle = {VDAT}, crossref = {conf/vdat/2015}, ee = {https://doi.ieeecomputersociety.org/10.1109/ISVDAT.2015.7208117}, interhash = {c5c8e68f17bda31688934d629aaeb110}, intrahash = {d6c0461339bdfd933cd8231ecbc76482}, isbn = {978-1-4799-1743-3}, keywords = {dblp}, pages = {1-2}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T13:46:11.000+0200}, title = {RISC-V out-of-order data conversion co-processor.}, url = {http://dblp.uni-trier.de/db/conf/vdat/vdat2015.html#RaveendranPDSS15}, year = 2015 }