%0 Journal Article %1 journals/todaes/RiepeS03 %A Riepe, Michael A. %A Sakallah, Karem A. %D 2003 %J ACM Trans. Design Autom. Electr. Syst. %K dblp %N 1 %P 81-107 %T Transistor placement for noncomplementary digital VLSI cell synthesis. %U http://dblp.uni-trier.de/db/journals/todaes/todaes8.html#RiepeS03 %V 8

@article{journals/todaes/RiepeS03, added-at = {2018-11-06T00:00:00.000+0100}, author = {Riepe, Michael A. and Sakallah, Karem A.}, biburl = {https://www.bibsonomy.org/bibtex/2ffc02ba752db48b4c0489250f5f95dec/dblp}, ee = {https://doi.org/10.1145/606603.606608}, interhash = {cf93ad11694ad1d4412a55282ed66ac7}, intrahash = {ffc02ba752db48b4c0489250f5f95dec}, journal = {ACM Trans. Design Autom. Electr. Syst.}, keywords = {dblp}, number = 1, pages = {81-107}, timestamp = {2018-11-07T12:24:13.000+0100}, title = {Transistor placement for noncomplementary digital VLSI cell synthesis.}, url = {http://dblp.uni-trier.de/db/journals/todaes/todaes8.html#RiepeS03}, volume = 8, year = 2003 }