%0 Journal Article %1 journals/jssc/SakimuraSHHSSIT07 %A Sakimura, Noboru %A Sugibayashi, Tadahiko %A Honda, Takeshi %A Honjo, Hiroaki %A Saito, Shinsaku %A Suzuki, Tetsuhiro %A Ishiwata, Nobuyuki %A Tahara, Shuichi %D 2007 %J IEEE J. Solid State Circuits %K dblp %N 4 %P 830-838 %T MRAM Cell Technology for Over 500-MHz SoC. %U http://dblp.uni-trier.de/db/journals/jssc/jssc42.html#SakimuraSHHSSIT07 %V 42

@article{journals/jssc/SakimuraSHHSSIT07, added-at = {2022-10-02T00:00:00.000+0200}, author = {Sakimura, Noboru and Sugibayashi, Tadahiko and Honda, Takeshi and Honjo, Hiroaki and Saito, Shinsaku and Suzuki, Tetsuhiro and Ishiwata, Nobuyuki and Tahara, Shuichi}, biburl = {https://www.bibsonomy.org/bibtex/24cec13ed6ed801eb316dbfd6b914bdc9/dblp}, ee = {https://doi.org/10.1109/JSSC.2007.891665}, interhash = {d195ee21db9b9ecd9c81ca1ffbb014ae}, intrahash = {4cec13ed6ed801eb316dbfd6b914bdc9}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 4, pages = {830-838}, timestamp = {2024-04-08T10:44:07.000+0200}, title = {MRAM Cell Technology for Over 500-MHz SoC.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc42.html#SakimuraSHHSSIT07}, volume = 42, year = 2007 }