%0 Journal Article %1 journals/tvlsi/DuarteVI02 %A Duarte, D. E. %A Vijaykrishnan, Narayanan %A Irwin, Mary Jane %D 2002 %J IEEE Trans. Very Large Scale Integr. Syst. %K dblp %N 6 %P 844-855 %T A clock power model to evaluate impact of architectural and technology optimizations. %U http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi10.html#DuarteVI02 %V 10

@article{journals/tvlsi/DuarteVI02, added-at = {2020-03-11T00:00:00.000+0100}, author = {Duarte, D. E. and Vijaykrishnan, Narayanan and Irwin, Mary Jane}, biburl = {https://www.bibsonomy.org/bibtex/22ee0b3426ed3d90c952f89ea06603f93/dblp}, ee = {https://doi.org/10.1109/TVLSI.2002.808433}, interhash = {d19dbd0880ae4140ad4498984f732411}, intrahash = {2ee0b3426ed3d90c952f89ea06603f93}, journal = {IEEE Trans. Very Large Scale Integr. Syst.}, keywords = {dblp}, number = 6, pages = {844-855}, timestamp = {2020-03-12T11:45:46.000+0100}, title = {A clock power model to evaluate impact of architectural and technology optimizations.}, url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi10.html#DuarteVI02}, volume = 10, year = 2002 }