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%0 Conference Paper
%1 conf/apccas/MaheshwaramKM10
%A Maheshwaram, Satish
%A Kaushal, Gaurav
%A Manhas, S. K.
%B APCCAS
%D 2010
%I IEEE
%K dblp
%P 1219-1222
%T A high performance vertical Si nanowire CMOS for ultra high density circuits.
%U http://dblp.uni-trier.de/db/conf/apccas/apccas2010.html#MaheshwaramKM10
%@ 978-1-4244-7454-7
@inproceedings{conf/apccas/MaheshwaramKM10,
added-at = {2014-02-19T00:00:00.000+0100},
author = {Maheshwaram, Satish and Kaushal, Gaurav and Manhas, S. K.},
biburl = {https://www.bibsonomy.org/bibtex/2bd98785150fec1202e4d557f4f949548/dblp},
booktitle = {APCCAS},
crossref = {conf/apccas/2010},
ee = {http://dx.doi.org/10.1109/APCCAS.2010.5775005},
interhash = {d4b5bdd7d4a943a5a404a11aff295457},
intrahash = {bd98785150fec1202e4d557f4f949548},
isbn = {978-1-4244-7454-7},
keywords = {dblp},
pages = {1219-1222},
publisher = {IEEE},
timestamp = {2015-06-19T04:15:07.000+0200},
title = {A high performance vertical Si nanowire CMOS for ultra high density circuits.},
url = {http://dblp.uni-trier.de/db/conf/apccas/apccas2010.html#MaheshwaramKM10},
year = 2010
}
