%0 Journal Article %1 journals/vlsisp/ChabotANN21 %A Chabot, Alexandre %A Alouani, Ihsen %A Nouacer, Réda %A Niar, Smaïl %D 2021 %J J. Signal Process. Syst. %K dblp %N 4 %P 439-459 %T A Memory Reliability Enhancement Technique for Multi Bit Upsets. %U http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp93.html#ChabotANN21 %V 93

@article{journals/vlsisp/ChabotANN21, added-at = {2022-10-02T00:00:00.000+0200}, author = {Chabot, Alexandre and Alouani, Ihsen and Nouacer, Réda and Niar, Smaïl}, biburl = {https://www.bibsonomy.org/bibtex/27bbb70109e79f79b70f3d5226d35dada/dblp}, ee = {https://doi.org/10.1007/s11265-020-01603-5}, interhash = {e0b62b95cae4372c3d20aed32fca0d03}, intrahash = {7bbb70109e79f79b70f3d5226d35dada}, journal = {J. Signal Process. Syst.}, keywords = {dblp}, number = 4, pages = {439-459}, timestamp = {2024-04-09T03:12:10.000+0200}, title = {A Memory Reliability Enhancement Technique for Multi Bit Upsets.}, url = {http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp93.html#ChabotANN21}, volume = 93, year = 2021 }