%0 Conference Paper %1 conf/vlsi/AghamirzaieRZN10 %A Aghamirzaie, Delasa %A Razavi, Seyyed Ahmad %A Zamani, Morteza Saheb %A Nabiyouni, Mahdi %B VLSI-SoC %D 2010 %I IEEE %K dblp %P 85-90 %T Reduction of process variation effect on FPGAs using multiple configurations. %U http://dblp.uni-trier.de/db/conf/vlsi/vlsisoc2010.html#AghamirzaieRZN10

@inproceedings{conf/vlsi/AghamirzaieRZN10, added-at = {2018-11-02T00:00:00.000+0100}, author = {Aghamirzaie, Delasa and Razavi, Seyyed Ahmad and Zamani, Morteza Saheb and Nabiyouni, Mahdi}, biburl = {https://www.bibsonomy.org/bibtex/2de2861b0857c212578986ed299c75b9f/dblp}, booktitle = {VLSI-SoC}, crossref = {conf/vlsi/2010soc}, ee = {https://doi.org/10.1109/VLSISOC.2010.5642616}, interhash = {f6006a26c3f6f3c0f5b9967fcd389c3e}, intrahash = {de2861b0857c212578986ed299c75b9f}, keywords = {dblp}, pages = {85-90}, publisher = {IEEE}, timestamp = {2018-11-03T16:26:27.000+0100}, title = {Reduction of process variation effect on FPGAs using multiple configurations.}, url = {http://dblp.uni-trier.de/db/conf/vlsi/vlsisoc2010.html#AghamirzaieRZN10}, year = 2010 }