%0 Journal Article %1 journals/iet-cds/WangSTCLJ23 %A Wang, Chua-Chin %A Sangalang, Ralph Gerard B. %A Tseng, I-Ting %A Chiu, Yi-Jen %A Lin, Yu-Cheng %A Jose, Oliver Lexter July A. %D 2023 %J IET Circuits Devices Syst. %K dblp %N 2 %P 75-87 %T A 1.0 fJ energy/bit single-ended 1 kb 6T SRAM implemented using 40 nm CMOS process. %U http://dblp.uni-trier.de/db/journals/iet-cds/iet-cds17.html#WangSTCLJ23 %V 17

@article{journals/iet-cds/WangSTCLJ23, added-at = {2023-06-26T00:00:00.000+0200}, author = {Wang, Chua-Chin and Sangalang, Ralph Gerard B. and Tseng, I-Ting and Chiu, Yi-Jen and Lin, Yu-Cheng and Jose, Oliver Lexter July A.}, biburl = {https://www.bibsonomy.org/bibtex/2d3384745c6530e2151dd9bfc62341dcc/dblp}, ee = {https://doi.org/10.1049/cds2.12141}, interhash = {f7fc110179d20b5f7de1b6cea486237f}, intrahash = {d3384745c6530e2151dd9bfc62341dcc}, journal = {IET Circuits Devices Syst.}, keywords = {dblp}, month = {March}, number = 2, pages = {75-87}, timestamp = {2024-04-08T16:07:25.000+0200}, title = {A 1.0 fJ energy/bit single-ended 1 kb 6T SRAM implemented using 40 nm CMOS process.}, url = {http://dblp.uni-trier.de/db/journals/iet-cds/iet-cds17.html#WangSTCLJ23}, volume = 17, year = 2023 }