%0 Journal Article %1 journals/corr/abs-1911-00139 %A Jiang, Weiwen %A Lou, Qiuwen %A Yan, Zheyu %A Yang, Lei %A Hu, Jingtong %A Hu, Xiaobo Sharon %A Shi, Yiyu %D 2019 %J CoRR %K dblp %T Device-Circuit-Architecture Co-Exploration for Computing-in-Memory Neural Accelerators. %U http://dblp.uni-trier.de/db/journals/corr/corr1911.html#abs-1911-00139 %V abs/1911.00139

@article{journals/corr/abs-1911-00139, added-at = {2022-12-13T00:00:00.000+0100}, author = {Jiang, Weiwen and Lou, Qiuwen and Yan, Zheyu and Yang, Lei and Hu, Jingtong and Hu, Xiaobo Sharon and Shi, Yiyu}, biburl = {https://www.bibsonomy.org/bibtex/201802f0afeece6701a9ce4e4e1397e68/dblp}, ee = {http://arxiv.org/abs/1911.00139}, interhash = {fbd108c0a0631f5bd921f1fc813184dd}, intrahash = {01802f0afeece6701a9ce4e4e1397e68}, journal = {CoRR}, keywords = {dblp}, timestamp = {2024-04-08T21:58:04.000+0200}, title = {Device-Circuit-Architecture Co-Exploration for Computing-in-Memory Neural Accelerators.}, url = {http://dblp.uni-trier.de/db/journals/corr/corr1911.html#abs-1911-00139}, volume = {abs/1911.00139}, year = 2019 }