%0 Journal Article %1 journals/jssc/KubosawaHATAASS99 %A Kubosawa, Hajime %A Higaki, Naoshi %A Ando, Satoshi %A Takahashi, Hiromasa %A Asada, Yoshimi %A Anbutsu, Hideaki %A Sato, Tomio %A Sakate, Masato %A Suga, Atsuhiro %A Kimura, Michihide %A Miyake, Hideo %A Okano, Hiroshi %A Asato, Akira %A Kimura, Yasunori %A Nakayama, Hiroshi %A Kimoto, Masayoshi %A Hirochi, Katsuji %A Saito, Hideki %A Kaido, Norio %A Nakagawa, Yukihiro %A Shimada, Toshio %D 1999 %J IEEE J. Solid State Circuits %K dblp %N 11 %P 1619-1626 %T A 2.5-GFLOPS, 6.5 million polygons per second, four-way VLIW geometry processor with SIMD instructions and a software bypass mechanism. %U http://dblp.uni-trier.de/db/journals/jssc/jssc34.html#KubosawaHATAASS99 %V 34

@article{journals/jssc/KubosawaHATAASS99, added-at = {2022-07-07T00:00:00.000+0200}, author = {Kubosawa, Hajime and Higaki, Naoshi and Ando, Satoshi and Takahashi, Hiromasa and Asada, Yoshimi and Anbutsu, Hideaki and Sato, Tomio and Sakate, Masato and Suga, Atsuhiro and Kimura, Michihide and Miyake, Hideo and Okano, Hiroshi and Asato, Akira and Kimura, Yasunori and Nakayama, Hiroshi and Kimoto, Masayoshi and Hirochi, Katsuji and Saito, Hideki and Kaido, Norio and Nakagawa, Yukihiro and Shimada, Toshio}, biburl = {https://www.bibsonomy.org/bibtex/24ec6441d3d66ebd5d7344c7588df2423/dblp}, ee = {https://doi.org/10.1109/4.799871}, interhash = {59c095aa4ef78b40e68302e29071127b}, intrahash = {4ec6441d3d66ebd5d7344c7588df2423}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 11, pages = {1619-1626}, timestamp = {2024-04-08T10:42:42.000+0200}, title = {A 2.5-GFLOPS, 6.5 million polygons per second, four-way VLIW geometry processor with SIMD instructions and a software bypass mechanism.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc34.html#KubosawaHATAASS99}, volume = 34, year = 1999 }