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Circuits and Systems: An International Journal (CSIJ) 1 (2): 13-21 (April 2014)

This paper presents the design of a low-power CMOS current-frequency (I–F) Analog–Digital Converter. The ADC is designed for implantable blood-glucose monitoring. This current frequency ADC uses nArange of input currents to set and compare voltage oscillations against a self-produced reference to resolve 0–32nA with an accuracy of 5-bits at a 225MHz sampling rate. The comparator used is a dynamic latch comparator and the output is fetched from a 5-bit counter. This is designed in 180nm CMOS technology with a supply of 1.8V, it operating voltage taken here is 0.0- 1.8V with power consumption of 12.3nW using Cadence tools.
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