%0 Conference Paper %1 conf/glvlsi/SathanurPBMMP08 %A Sathanur, Ashoka Visweswara %A Pullini, Antonio %A Benini, Luca %A Macii, Alberto %A Macii, Enrico %A Poncino, Massimo %B ACM Great Lakes Symposium on VLSI %D 2008 %E Narayanan, Vijaykrishnan %E Yan, Zhiyuan %E Macii, Enrico %E Bhanja, Sanjukta %I ACM %K dblp %P 177-182 %T Optimal sleep transistor synthesis under timing and area constraints. %U http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi2008.html#SathanurPBMMP08 %@ 978-1-59593-999-9

@inproceedings{conf/glvlsi/SathanurPBMMP08, added-at = {2023-09-30T00:00:00.000+0200}, author = {Sathanur, Ashoka Visweswara and Pullini, Antonio and Benini, Luca and Macii, Alberto and Macii, Enrico and Poncino, Massimo}, biburl = {https://www.bibsonomy.org/bibtex/255bd7cfc75aa6610f52433bbdd165d24/dblp}, booktitle = {ACM Great Lakes Symposium on VLSI}, crossref = {conf/glvlsi/2008}, editor = {Narayanan, Vijaykrishnan and Yan, Zhiyuan and Macii, Enrico and Bhanja, Sanjukta}, ee = {https://doi.org/10.1145/1366110.1366155}, interhash = {cb3a00a61b07df17c398c56f9e883c59}, intrahash = {55bd7cfc75aa6610f52433bbdd165d24}, isbn = {978-1-59593-999-9}, keywords = {dblp}, pages = {177-182}, publisher = {ACM}, timestamp = {2024-04-10T14:31:09.000+0200}, title = {Optimal sleep transistor synthesis under timing and area constraints.}, url = {http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi2008.html#SathanurPBMMP08}, year = 2008 }