PowerViP: Soc Power Estimation Framework at Transaction Level
I. Lee, H. Kim, P. Yang, S. Yoo, E. Choi, J. Kong, and S. Eo. ASP-DAC '06: Proceedings of the 2006 Conference on Asia South Pacific Design Automation, page 551--558. New York, NY, USA, ACM Press, (2006)
Abstract
In this work, we propose a SoC power estimation framework built on our system-level simulation environment. Our framework provides designers with the system-level power profile in a cycle-accurate manner. We target the framework to run fast and accurately, which is enabled by adopting different modeling techniques depending on the power characteristics of various IP blocks. The framework can be applied to any target SoC design.
%0 Conference Paper
%1 lee2006powervip
%A Lee, I.
%A Kim, H.
%A Yang, P.
%A Yoo, S.
%A Choi, E. Y. Chung. K. M.
%A Kong, J. T.
%A Eo, S. K.
%B ASP-DAC '06: Proceedings of the 2006 Conference on Asia South Pacific Design Automation
%C New York, NY, USA
%D 2006
%I ACM Press
%K DAC Framework Power SoC estimation
%P 551--558
%T PowerViP: Soc Power Estimation Framework at Transaction Level
%U http://doi.acm.org/10.1145/1118299.1118431
%X In this work, we propose a SoC power estimation framework built on our system-level simulation environment. Our framework provides designers with the system-level power profile in a cycle-accurate manner. We target the framework to run fast and accurately, which is enabled by adopting different modeling techniques depending on the power characteristics of various IP blocks. The framework can be applied to any target SoC design.
%@ 0-7803-9451-8
@inproceedings{lee2006powervip,
abstract = {In this work, we propose a SoC power estimation framework built on our system-level simulation environment. Our framework provides designers with the system-level power profile in a cycle-accurate manner. We target the framework to run fast and accurately, which is enabled by adopting different modeling techniques depending on the power characteristics of various IP blocks. The framework can be applied to any target SoC design.},
added-at = {2007-04-12T13:23:43.000+0200},
address = {New York, NY, USA},
author = {Lee, I. and Kim, H. and Yang, P. and Yoo, S. and Choi, E. Y. Chung. K. M. and Kong, J. T. and Eo, S. K.},
biburl = {https://www.bibsonomy.org/bibtex/25850fef88e27ecbbf5ceb4d87c96204e/derkling},
booktitle = {ASP-DAC '06: Proceedings of the 2006 Conference on Asia South Pacific Design Automation},
hardcopy = {Yes},
interhash = {51264426779659e7e3b381c060a6ff41},
intrahash = {5850fef88e27ecbbf5ceb4d87c96204e},
isbn = {0-7803-9451-8},
keywords = {DAC Framework Power SoC estimation},
local = {./AllPapers/2006_DAC_lee2006powervip.pdf},
pages = {551--558},
publisher = {ACM Press},
timestamp = {2007-04-12T13:23:43.000+0200},
title = {PowerViP: Soc Power Estimation Framework at Transaction Level},
url = {http://doi.acm.org/10.1145/1118299.1118431},
year = 2006
}