%0 Conference Paper %1 conf/iccd/MohyuddinPP09 %A Mohyuddin, Nasir %A Patel, Kimish %A Pedram, Massoud %B ICCD %D 2009 %I IEEE Computer Society %K dblp %P 166-172 %T Deterministic clock gating to eliminate wasteful activity due to wrong-path instructions in out-of-order superscalar processors. %U http://dblp.uni-trier.de/db/conf/iccd/iccd2009.html#MohyuddinPP09 %@ 978-1-4244-5029-9

@inproceedings{conf/iccd/MohyuddinPP09, added-at = {2023-03-23T00:00:00.000+0100}, author = {Mohyuddin, Nasir and Patel, Kimish and Pedram, Massoud}, biburl = {https://www.bibsonomy.org/bibtex/25f2a080d7af786bdd7e58811f281b7b0/dblp}, booktitle = {ICCD}, crossref = {conf/iccd/2009}, ee = {https://doi.ieeecomputersociety.org/10.1109/ICCD.2009.5413158}, interhash = {24f67b74b4ff5f01c3d3b88b5a42cc09}, intrahash = {5f2a080d7af786bdd7e58811f281b7b0}, isbn = {978-1-4244-5029-9}, keywords = {dblp}, pages = {166-172}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T06:23:20.000+0200}, title = {Deterministic clock gating to eliminate wasteful activity due to wrong-path instructions in out-of-order superscalar processors.}, url = {http://dblp.uni-trier.de/db/conf/iccd/iccd2009.html#MohyuddinPP09}, year = 2009 }