%0 Conference Paper %1 conf/vlsit/YangXOI22 %A Yang, Zunsong %A Xu, Zule %A Osada, Masaru %A Iizuka, Tetsuya %B VLSI Technology and Circuits %D 2022 %I IEEE %K dblp %P 10-11 %T A 10-GHz Inductorless Cascaded PLL with Zero-ISF Subsampling Phase Detector Achieving -63-dBc Reference Spur, 175-fs RMS Jitter and -240-dB FOMjitter. %U http://dblp.uni-trier.de/db/conf/vlsit/vlsit2022.html#YangXOI22 %@ 978-1-6654-9772-5

@inproceedings{conf/vlsit/YangXOI22, added-at = {2022-10-02T00:00:00.000+0200}, author = {Yang, Zunsong and Xu, Zule and Osada, Masaru and Iizuka, Tetsuya}, biburl = {https://www.bibsonomy.org/bibtex/26307b1eabfdbe3a33e5d7dbec12e22d2/dblp}, booktitle = {VLSI Technology and Circuits}, crossref = {conf/vlsit/2022}, ee = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830382}, interhash = {b6bc6be0fb8f96ad76295c2b87121f93}, intrahash = {6307b1eabfdbe3a33e5d7dbec12e22d2}, isbn = {978-1-6654-9772-5}, keywords = {dblp}, pages = {10-11}, publisher = {IEEE}, timestamp = {2024-04-09T19:13:06.000+0200}, title = {A 10-GHz Inductorless Cascaded PLL with Zero-ISF Subsampling Phase Detector Achieving -63-dBc Reference Spur, 175-fs RMS Jitter and -240-dB FOMjitter.}, url = {http://dblp.uni-trier.de/db/conf/vlsit/vlsit2022.html#YangXOI22}, year = 2022 }