Timing Analysis of Assembler Code Control-Flow Paths
C. Fidge. Lecture notes in computer science, (2002)http://www.springerlink.com/content/g95lwpppvy5rdpcu/.
Abstract
Timing analysis of assembler code is essential to achieve the strongest possible guarantee of correctness for safety-critical, real-time software. Previous work has shown how timing constraints on control-flow paths through high-level language programs can be formalised using the semantics of the statements comprising the path. We extend these results to assembler-level code where it becomes possible to not only determine timing constraints, but also to verify them against the known execution times for each instruction. A minimal formal model is developed with both a weakest liberal precondition and a strongest postcondition semantics. However, despite the formalism’s simplicity, it is shown that complex timing behaviour associated with instruction pipelining and iterative code can be modelled accurately.
%0 Journal Article
%1 AsmFlowPaths2002
%A Fidge, C.J.
%D 2002
%I Springer
%J Lecture notes in computer science
%K mgr todo_tags
%P 370--389
%T Timing Analysis of Assembler Code Control-Flow Paths
%U http://sky.fit.qut.edu.au/~fidgec/Publications/fidge02a.pdf
%X Timing analysis of assembler code is essential to achieve the strongest possible guarantee of correctness for safety-critical, real-time software. Previous work has shown how timing constraints on control-flow paths through high-level language programs can be formalised using the semantics of the statements comprising the path. We extend these results to assembler-level code where it becomes possible to not only determine timing constraints, but also to verify them against the known execution times for each instruction. A minimal formal model is developed with both a weakest liberal precondition and a strongest postcondition semantics. However, despite the formalism’s simplicity, it is shown that complex timing behaviour associated with instruction pipelining and iterative code can be modelled accurately.
@article{AsmFlowPaths2002,
abstract = {Timing analysis of assembler code is essential to achieve the strongest possible guarantee of correctness for safety-critical, real-time software. Previous work has shown how timing constraints on control-flow paths through high-level language programs can be formalised using the semantics of the statements comprising the path. We extend these results to assembler-level code where it becomes possible to not only determine timing constraints, but also to verify them against the known execution times for each instruction. A minimal formal model is developed with both a weakest liberal precondition and a strongest postcondition semantics. However, despite the formalism’s simplicity, it is shown that complex timing behaviour associated with instruction pipelining and iterative code can be modelled accurately.},
added-at = {2009-07-16T19:53:25.000+0200},
author = {Fidge, C.J.},
biburl = {https://www.bibsonomy.org/bibtex/275740b47345f1b427b06271083ff200f/gwpl},
interhash = {146405a1e2b44d54e3e8d142ecdcacc3},
intrahash = {75740b47345f1b427b06271083ff200f},
journal = {Lecture notes in computer science},
keywords = {mgr todo_tags},
note = {http://www.springerlink.com/content/g95lwpppvy5rdpcu/},
pages = {370--389},
publisher = {Springer},
school = {The University of Queensland, Australia},
timestamp = {2009-07-16T19:54:07.000+0200},
title = {Timing Analysis of Assembler Code Control-Flow Paths},
url = {http://sky.fit.qut.edu.au/~fidgec/Publications/fidge02a.pdf},
year = 2002
}