%0 Conference Paper %1 conf/vlsid/CzutroPLERB09 %A Czutro, Alejandro %A Polian, Ilia %A Lewis, Matthew %A Engelke, Piet %A Reddy, Sudhakar M. %A Becker, Bernd %B VLSI Design %D 2009 %I IEEE Computer Society %K dblp %P 227-232 %T TIGUAN: Thread-Parallel Integrated Test Pattern Generator Utilizing Satisfiability ANalysis. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2009.html#CzutroPLERB09 %@ 978-0-7695-3506-7

@inproceedings{conf/vlsid/CzutroPLERB09, added-at = {2023-03-24T00:00:00.000+0100}, author = {Czutro, Alejandro and Polian, Ilia and Lewis, Matthew and Engelke, Piet and Reddy, Sudhakar M. and Becker, Bernd}, biburl = {https://www.bibsonomy.org/bibtex/27df99f7b8954476212de39af22d66d76/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/2009}, ee = {https://doi.ieeecomputersociety.org/10.1109/VLSI.Design.2009.20}, interhash = {77a7a760498cc6b1253e19683c06f47b}, intrahash = {7df99f7b8954476212de39af22d66d76}, isbn = {978-0-7695-3506-7}, keywords = {dblp}, pages = {227-232}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T04:19:34.000+0200}, title = {TIGUAN: Thread-Parallel Integrated Test Pattern Generator Utilizing Satisfiability ANalysis.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2009.html#CzutroPLERB09}, year = 2009 }