%0 Conference Paper %1 conf/ddecs/IsaM17 %A Isa, Radek %A Matousek, Jirí %B DDECS %D 2017 %E Dietrich, Manfred %E Novák, Ondrej %I IEEE %K dblp %P 171-176 %T A novel architecture for LZSS compression of configuration bitstreams within FPGA. %U http://dblp.uni-trier.de/db/conf/ddecs/ddecs2017.html#IsaM17 %@ 978-1-5386-0472-4

@inproceedings{conf/ddecs/IsaM17, added-at = {2019-01-28T00:00:00.000+0100}, author = {Isa, Radek and Matousek, Jirí}, biburl = {https://www.bibsonomy.org/bibtex/296bd6dbc33930c8ed3f067ea995e97ce/dblp}, booktitle = {DDECS}, crossref = {conf/ddecs/2017}, editor = {Dietrich, Manfred and Novák, Ondrej}, ee = {https://doi.org/10.1109/DDECS.2017.7934587}, interhash = {3c95522a8c12441426aeb7e9ed32338a}, intrahash = {96bd6dbc33930c8ed3f067ea995e97ce}, isbn = {978-1-5386-0472-4}, keywords = {dblp}, pages = {171-176}, publisher = {IEEE}, timestamp = {2019-10-17T11:51:25.000+0200}, title = {A novel architecture for LZSS compression of configuration bitstreams within FPGA.}, url = {http://dblp.uni-trier.de/db/conf/ddecs/ddecs2017.html#IsaM17}, year = 2017 }