%0 Conference Paper %1 conf/isscc/FengJKLHZRW24 %A Feng, Liqun %A Ji, Xuansheng %A Kuang, Longhao %A Liao, Qianxian %A Han, Su %A Zhao, Jiahao %A Rhee, Woogeun %A Wang, Zhihua %B ISSCC %D 2024 %I IEEE %K dblp %P 266-268 %T 14.7 A 0.45V 0.72mW 2.4GHz Bias-Current-Free Fractional-N Hybrid PLL Using a Voltage-Mode Phase Interpolator in 28nm CMOS. %U http://dblp.uni-trier.de/db/conf/isscc/isscc2024.html#FengJKLHZRW24 %@ 979-8-3503-0620-0

@inproceedings{conf/isscc/FengJKLHZRW24, added-at = {2024-03-19T00:00:00.000+0100}, author = {Feng, Liqun and Ji, Xuansheng and Kuang, Longhao and Liao, Qianxian and Han, Su and Zhao, Jiahao and Rhee, Woogeun and Wang, Zhihua}, biburl = {https://www.bibsonomy.org/bibtex/2a2aaee84b40a1f66c8ff041ffde626a2/dblp}, booktitle = {ISSCC}, crossref = {conf/isscc/2024}, ee = {https://doi.org/10.1109/ISSCC49657.2024.10454404}, interhash = {73647575c045496ee3af6d6c55002c53}, intrahash = {a2aaee84b40a1f66c8ff041ffde626a2}, isbn = {979-8-3503-0620-0}, keywords = {dblp}, pages = {266-268}, publisher = {IEEE}, timestamp = {2024-04-09T20:43:07.000+0200}, title = {14.7 A 0.45V 0.72mW 2.4GHz Bias-Current-Free Fractional-N Hybrid PLL Using a Voltage-Mode Phase Interpolator in 28nm CMOS.}, url = {http://dblp.uni-trier.de/db/conf/isscc/isscc2024.html#FengJKLHZRW24}, year = 2024 }