%0 Conference Paper %1 conf/mcsoc/NakasatoDFKMIY12 %A Nakasato, Naohito %A Daisaka, Hiroshi %A Fukushige, Toshiyuki %A Kawai, Atsushi %A Makino, Junichiro %A Ishikawa, Tadashi %A Yuasa, Fukuko %B MCSoC %D 2012 %I IEEE Computer Society %K dblp %P 75-83 %T GRAPE-MPs: Implementation of an SIMD for Quadruple/Hexuple/Octuple-Precision Arithmetic Operation on a Structured ASIC and an FPGA. %U http://dblp.uni-trier.de/db/conf/mcsoc/mcsoc2012.html#NakasatoDFKMIY12 %@ 978-1-4673-2535-6

@inproceedings{conf/mcsoc/NakasatoDFKMIY12, added-at = {2023-06-26T00:00:00.000+0200}, author = {Nakasato, Naohito and Daisaka, Hiroshi and Fukushige, Toshiyuki and Kawai, Atsushi and Makino, Junichiro and Ishikawa, Tadashi and Yuasa, Fukuko}, biburl = {https://www.bibsonomy.org/bibtex/2a6746af174775453de3bee667cfe52f5/dblp}, booktitle = {MCSoC}, crossref = {conf/mcsoc/2012}, ee = {https://doi.ieeecomputersociety.org/10.1109/MCSoC.2012.31}, interhash = {812455a5b513cf4f6736a0fa9bfb8efc}, intrahash = {a6746af174775453de3bee667cfe52f5}, isbn = {978-1-4673-2535-6}, keywords = {dblp}, pages = {75-83}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T06:04:09.000+0200}, title = {GRAPE-MPs: Implementation of an SIMD for Quadruple/Hexuple/Octuple-Precision Arithmetic Operation on a Structured ASIC and an FPGA.}, url = {http://dblp.uni-trier.de/db/conf/mcsoc/mcsoc2012.html#NakasatoDFKMIY12}, year = 2012 }