%0 Journal Article %1 ArdLed17VLSI %A Ardakani, Arash %A Leduc-Primeau, Francois %A Onizawa, Naoya %A Hanyu, Takahiro %A Gross, Warren J %D 2017 %I IEEE %J IEEE Transactions on Very Large Scale Integration (VLSI) Systems %K approximate architecture deep_learning hardware %N 10 %P 2688--2699 %T VLSI implementation of deep neural network using integral stochastic computing %U https://ieeexplore.ieee.org/abstract/document/7839313/ %V 25

@article{ArdLed17VLSI, added-at = {2018-08-14T08:53:14.000+0200}, author = {Ardakani, Arash and Leduc-Primeau, Fran{\c{c}}ois and Onizawa, Naoya and Hanyu, Takahiro and Gross, Warren J}, biburl = {https://www.bibsonomy.org/bibtex/2ab118c04fac4f3a8ae6b3ffde8fdc232/loroch}, interhash = {3d0b1bf98f0a214ba156496112da2b2e}, intrahash = {ab118c04fac4f3a8ae6b3ffde8fdc232}, journal = {IEEE Transactions on Very Large Scale Integration (VLSI) Systems}, keywords = {approximate architecture deep_learning hardware}, number = 10, pages = {2688--2699}, publisher = {IEEE}, timestamp = {2018-08-14T08:53:14.000+0200}, title = {VLSI implementation of deep neural network using integral stochastic computing}, url = {https://ieeexplore.ieee.org/abstract/document/7839313/}, volume = 25, year = 2017 }