%0 Conference Paper %1 conf/socc/LiuFZTCW10 %A Liu, Dan %A Feng, Yi %A Zhou, Jingjin %A Tong, Dong %A Cheng, Xu %A Wang, Keyi %B SoCC %D 2010 %E Büchner, Thomas %E Sridhar, Ramalingam %E Marshall, Andrew %E Schuhmann, Norbert %I IEEE %K dblp %P 182-187 %T TERA: A FPGA-based trace-driven emulation framework for designing on-chip communication architectures. %U http://dblp.uni-trier.de/db/conf/socc/socc2010.html#LiuFZTCW10 %@ 978-1-4244-6682-5

@inproceedings{conf/socc/LiuFZTCW10, added-at = {2018-01-22T00:00:00.000+0100}, author = {Liu, Dan and Feng, Yi and Zhou, Jingjin and Tong, Dong and Cheng, Xu and Wang, Keyi}, biburl = {https://www.bibsonomy.org/bibtex/2b9b0aafed824ecc01bcdb9f75a727a13/dblp}, booktitle = {SoCC}, crossref = {conf/socc/2010}, editor = {Büchner, Thomas and Sridhar, Ramalingam and Marshall, Andrew and Schuhmann, Norbert}, ee = {https://doi.org/10.1109/SOCC.2010.5784749}, interhash = {9643f048f401fec22a725df54bdb968b}, intrahash = {b9b0aafed824ecc01bcdb9f75a727a13}, isbn = {978-1-4244-6682-5}, keywords = {dblp}, pages = {182-187}, publisher = {IEEE}, timestamp = {2018-01-23T11:38:52.000+0100}, title = {TERA: A FPGA-based trace-driven emulation framework for designing on-chip communication architectures.}, url = {http://dblp.uni-trier.de/db/conf/socc/socc2010.html#LiuFZTCW10}, year = 2010 }