Presentation of a workgroup synthesis mechanism to compile an OpenCL kernel to FPGA-based accelerators embedded in a multi-core CPU system-on-a-chip (SoC).
@article{hosseinabady2015optimised,
added-at = {2016-07-18T01:13:13.000+0200},
author = {"Hosseinabady, Mohammad" and "Nunez-Yanez, Jose Luis"},
biburl = {https://www.bibsonomy.org/bibtex/2b9ca8277f85660c2ac6ff7d871f81334/csl_uth},
description = {Presentation of a workgroup synthesis mechanism to compile an OpenCL kernel to FPGA-based accelerators embedded in a multi-core CPU system-on-a-chip (SoC).},
interhash = {e080e44bcc27a20ebaa1722f887fd399},
intrahash = {b9ca8277f85660c2ac6ff7d871f81334},
keywords = {opencl FPGA},
timestamp = {2018-02-19T18:25:17.000+0100},
title = {Optimised OpenCL Workgroup Synthesis for Hybrid ARM-FPGA Devices},
year = 2015
}