%0 Conference Paper %1 conf/islped/WuP00 %A Wu, Xunwei %A Pedram, Massoud %B ISLPED %D 2000 %E Blaauw, David T. %E Enz, Christian C. %E Gabara, Thaddeus %E Macii, Enrico %I ACM %K dblp %P 143-148 %T Low power sequential circuit design by using priority encoding and clock gating. %U http://dblp.uni-trier.de/db/conf/islped/islped2000.html#WuP00 %@ 1-58113-190-9

@inproceedings{conf/islped/WuP00, added-at = {2018-11-06T00:00:00.000+0100}, author = {Wu, Xunwei and Pedram, Massoud}, biburl = {https://www.bibsonomy.org/bibtex/2caa41f307fd68540dc6518c3ecbae95d/dblp}, booktitle = {ISLPED}, crossref = {conf/islped/2000}, editor = {Blaauw, David T. and Enz, Christian C. and Gabara, Thaddeus and Macii, Enrico}, ee = {https://doi.org/10.1145/344166.344557}, interhash = {98d8bd8fb3e976f149abd61257f2a643}, intrahash = {caa41f307fd68540dc6518c3ecbae95d}, isbn = {1-58113-190-9}, keywords = {dblp}, pages = {143-148}, publisher = {ACM}, timestamp = {2018-11-07T16:25:29.000+0100}, title = {Low power sequential circuit design by using priority encoding and clock gating.}, url = {http://dblp.uni-trier.de/db/conf/islped/islped2000.html#WuP00}, year = 2000 }