%0 Journal Article %1 journals/micro/SuhLB04a %A Suh, Taeweon %A Lee, Hsien-Hsin S. %A Blough, Douglas M. %D 2004 %J IEEE Micro %K dblp %N 5 %P 70-78 %T Integrating Cache Coherence Protocols for Heterogeneous Multiprocessor Systems, Part 2. %U http://dblp.uni-trier.de/db/journals/micro/micro24.html#SuhLB04a %V 24

@article{journals/micro/SuhLB04a, added-at = {2015-12-09T00:00:00.000+0100}, author = {Suh, Taeweon and Lee, Hsien-Hsin S. and Blough, Douglas M.}, biburl = {https://www.bibsonomy.org/bibtex/2d6c2cc21a4eae53065a3f262be3fbd60/dblp}, ee = {http://doi.ieeecomputersociety.org/10.1109/MM.2004.50}, interhash = {dc220b20913a9c6c37a7d819ec2f3062}, intrahash = {d6c2cc21a4eae53065a3f262be3fbd60}, journal = {IEEE Micro}, keywords = {dblp}, number = 5, pages = {70-78}, timestamp = {2015-12-12T11:39:50.000+0100}, title = {Integrating Cache Coherence Protocols for Heterogeneous Multiprocessor Systems, Part 2.}, url = {http://dblp.uni-trier.de/db/journals/micro/micro24.html#SuhLB04a}, volume = 24, year = 2004 }