%0 Journal Article %1 journals/jssc/KrishnamurthyWM18 %A Krishnamurthy, Harish Kumar %A Weng, Sheldon %A Matthew, George E. %A Desai, Nachiket V. %A Saraswat, Ruchir %A Ravichandran, Krishnan %A Tschanz, James W. %A De, Vivek %D 2018 %J IEEE J. Solid State Circuits %K dblp %N 4 %P 1038-1048 %T A Digitally Controlled Fully Integrated Voltage Regulator With 3-D-TSV-Based On-Die Solenoid Inductor With a Planar Magnetic Core for 3-D-Stacked Die Applications in 14-nm Tri-Gate CMOS. %U http://dblp.uni-trier.de/db/journals/jssc/jssc53.html#KrishnamurthyWM18 %V 53

@article{journals/jssc/KrishnamurthyWM18, added-at = {2020-08-30T00:00:00.000+0200}, author = {Krishnamurthy, Harish Kumar and Weng, Sheldon and Matthew, George E. and Desai, Nachiket V. and Saraswat, Ruchir and Ravichandran, Krishnan and Tschanz, James W. and De, Vivek}, biburl = {https://www.bibsonomy.org/bibtex/27f2e0b01d3251392abae92fef8b5dd66/dblp}, ee = {https://doi.org/10.1109/JSSC.2017.2773637}, interhash = {3e2919db9b15d9a61bbe62228ed7b432}, intrahash = {7f2e0b01d3251392abae92fef8b5dd66}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 4, pages = {1038-1048}, timestamp = {2020-08-31T11:42:40.000+0200}, title = {A Digitally Controlled Fully Integrated Voltage Regulator With 3-D-TSV-Based On-Die Solenoid Inductor With a Planar Magnetic Core for 3-D-Stacked Die Applications in 14-nm Tri-Gate CMOS.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc53.html#KrishnamurthyWM18}, volume = 53, year = 2018 }