%0 Conference Paper %1 conf/cisim/TalaveraPC18 %A Talavera, Guillermo %A Portero, Antoni %A Catthoor, Francky %B CISIM %D 2018 %E Saeed, Khalid %E Homenda, Wladyslaw %I Springer %K dblp %P 417-433 %T Impact of Address Generation on Multimedia Embedded VLIW Processors. %U http://dblp.uni-trier.de/db/conf/cisim/cisim2018.html#TalaveraPC18 %V 11127 %@ 978-3-319-99954-8

@inproceedings{conf/cisim/TalaveraPC18, added-at = {2018-10-03T00:00:00.000+0200}, author = {Talavera, Guillermo and Portero, Antoni and Catthoor, Francky}, biburl = {https://www.bibsonomy.org/bibtex/2a3370550c70de72d2e2cf5591a81d3dd/dblp}, booktitle = {CISIM}, crossref = {conf/cisim/2018}, editor = {Saeed, Khalid and Homenda, Wladyslaw}, ee = {https://doi.org/10.1007/978-3-319-99954-8_35}, interhash = {4a510abdcc50bdfcee63f5f2488c0507}, intrahash = {a3370550c70de72d2e2cf5591a81d3dd}, isbn = {978-3-319-99954-8}, keywords = {dblp}, pages = {417-433}, publisher = {Springer}, series = {Lecture Notes in Computer Science}, timestamp = {2019-05-15T15:28:58.000+0200}, title = {Impact of Address Generation on Multimedia Embedded VLIW Processors.}, url = {http://dblp.uni-trier.de/db/conf/cisim/cisim2018.html#TalaveraPC18}, volume = 11127, year = 2018 }