%0 Conference Paper %1 conf/iscas/AliotoPP06 %A Alioto, Massimo %A Palumbo, Gaetano %A Poli, Massimo %B ISCAS %D 2006 %I IEEE %K dblp %T Efficient output transition time modeling in CMOS gates with ramp/exponential inputs. %U http://dblp.uni-trier.de/db/conf/iscas/iscas2006.html#AliotoPP06 %@ 0-7803-9389-9

@inproceedings{conf/iscas/AliotoPP06, added-at = {2007-07-23T00:00:00.000+0200}, author = {Alioto, Massimo and Palumbo, Gaetano and Poli, Massimo}, biburl = {https://www.bibsonomy.org/bibtex/270273b541ea49fbd6da30c5a4a04ce96/dblp}, booktitle = {ISCAS}, crossref = {conf/iscas/2006}, ee = {http://dx.doi.org/10.1109/ISCAS.2006.1693786}, interhash = {4af469827c08b96f2bf06c97062fda15}, intrahash = {70273b541ea49fbd6da30c5a4a04ce96}, isbn = {0-7803-9389-9}, keywords = {dblp}, publisher = {IEEE}, timestamp = {2016-05-21T12:11:32.000+0200}, title = {Efficient output transition time modeling in CMOS gates with ramp/exponential inputs.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2006.html#AliotoPP06}, year = 2006 }