Abstract
Wireless sensor networks are occupying large space in the modern world. Technologies like FPGA appear with features to be explored as implementation of low-power system. In this project we built a low-power circuit applying the implementation of a technique to minimize the clocks number of the circuit and
focusing on the dynamic power consumption of the architecture was evaluated energy and logical consumption module to module. The architecture built has all the necessary features to integrate, synchronize and perform communication according to the application. Different analyses the consumption of a general architecture is shown and an operation mode acceptable to dynamic energy consumption of circuit to wireless sensor network on FPGA is achieved
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